4.3.2 Information Sharing and Work Distribution.

Includes bibliographical references and index.

Large Scale Network-Centric Distributed Systems; Contents; Preface; Acknowledgments; List of Figures; List of Tables; List of Contributors; Part1: Multicore and Many-Core (MC) Systems-on-Chip; 1 A Reconfigurable On-Chip Interconnection Network for Large Multicore Systems; 1.1 Introduction; 1.1.1 Multicore and Many-Core Era; 1.1.2 On-Chip Communication; 1.1.3 Conventional Communication Mechanisms; 1.1.4 Network-on-Chip; 1.1.5 NoC Topology Customization; 1.1.6 NoCs and Topology Reconfigurations; 1.1.7 Reconfigurations Policy; 1.2 Topology and Reconfiguration; 1.3 The Proposed NoC Architecture.

1.3.1 Baseline Reconfigurable NoC1.3.2 Generalized Reconfigurable NoC; 1.4 Energy and Performance-Aware Mapping; 1.4.1 The Design Procedure for the Baseline Reconfigurable NoC; 1.4.1.1 Core-to-Network Mapping; 1.4.1.2 Topology and Route Generation; 1.4.2 Mapping and Topology Generation for Cluster-Based NoC; 1.5 Experimental Results; 1.5.1 Baseline Reconfigurable NoC; 1.5.2 Performance Evaluation with Cost Constraints; 1.5.3 Comparison Cluster-Based NoC; 1.6 Conclusion; References; 2 Compilers, Techniques, and Tools for Supporting Programming Heterogeneous Many/Multicore Systems.

2.1 Introduction2.2 Programming Models and Tools for Many/Multicore; 2.2.1 OpenMP; 2.2.2 Brook for GPUs; 2.2.3 Sh; 2.2.4 CUDA; 2.2.4.1 Memory Management; 2.2.4.2 Kernel Creation and Invocation; 2.2.4.3 Synchronization; 2.2.5 HMPP; 2.2.6 OpenCL; 2.2.7 OpenAcc; 2.3 Compilers and Support Tools; 2.3.1 RapidMind Multicore Development Platform; 2.3.2 OpenMPC; 2.3.3 Source-to-Source Transformers; 2.3.3.1 CHiLL; 2.3.3.2 Cetus; 2.3.3.3 ROSE Compiler; 2.3.3.4 LLVM; 2.4 CALuMET: A Tool for Supporting Software Parallelization; 2.4.1 Component-Based Source Code Analysis Architecture.

2.4.2 Algorithmic Recognizer Add-on2.4.3 Source Code Transformer for GPUs; 2.5 Conclusion; References; 3 A Multithreaded Branch-and-Bound Algorithm for Solving the Flow-Shop Problem on a Multicore Environment; 3.1 Introduction; 3.2 Flow-Shop Scheduling Problem; 3.3 Parallel Branch-and-Bound Algorithms; 3.3.1 Multiparametric Parallel Model; 3.3.2 Parallel Tree Exploration Model; 3.3.3 Parallel Evaluation of Bounds; 3.3.4 Parallel Evaluation of a Bound Model; 3.4 A Multithreaded Branch-and-Bound; 3.4.1 Low-Level Multithreaded B & B; 3.4.2 High-Level Multithreaded B & B.

3.5 The Proposed Multithreaded B & B3.6 Experiments and Results; 3.6.1 Flow-Shop Instances; 3.6.2 Hardware and Software Testbed; 3.6.3 Experimental Protocol; 3.6.4 Performance Analysis; 3.6.5 Page Faults; 3.6.6 Context Switches; 3.7 Conclusion; References; Part 2: Pervasive/Ubiquitous Computing and Peer-to-Peer Systems; 4 Large-Scale P2P-Inspired Problem-Solving: A Formal and Experimental Study; 4.1 Introduction; 4.1.1 Motivations; 4.1.2 Contribution and Results; 4.1.3 Related Works; 4.1.4 Outline; 4.2 Background; 4.3 A Pure Peer-to-Peer B & B Approach; 4.3.1 Preliminaries.

A highly accessible reference offering a broad range of topics and insights on large scale network-centric distributed systems Evolving from the fields of high-performance computing and networking, large scale network-centric distributed systems continues to grow as one of the most important topics in computing and communication and many interdisciplinary areas. Dealing with both wired and wireless networks, this book focuses on the design and performance issues of such systems. Large Scale Network-Centric Distributed Systems provides in-depth coverage ranging from ground-level hardware issues (such as buffer organization, router delay, and flow control) to the high-level issues immediately concerning application or system users (including parallel programming, middleware, and OS support for such computing systems). Arranged in five parts, it explains and analyzes complex topics to an unprecedented degree.

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