000 01127cam a22003255a 4500
001 13807130
003 BD-DhUL
005 20150114135532.0
008 150115s2006 ii a 001 0 eng
010 _a 2004117355
020 _a9788131501948
040 _aDLC
_cDLC
_dDLC
_dBD-DhUL
042 _apcc
082 _a621.395
_bHWD
100 1 _aHwang, Enoch O.
245 1 0 _aDigital logic and microprocessor design with vhdl /
_cEnoch Hwang.
250 _a1st ed.
260 _aNew Delhi :
_bCengage Learning,
_c2006.
263 _a0503
300 _axix, 588 p. :
_bill. ;
_c25 cm.
365 _aIRs
_b395
500 _aIncludes index.
650 _aLogic design
_xData processing.
856 4 2 _3Contributor biographical information
_uhttp://www.loc.gov/catdir/enhancements/fy1103/2004117355-b.html
856 4 2 _3Publisher description
_uhttp://www.loc.gov/catdir/enhancements/fy1103/2004117355-d.html
856 4 1 _3Table of contents only
_uhttp://www.loc.gov/catdir/enhancements/fy1212/2004117355-t.html
906 _a0
_bibc
_corignew
_d2
_eepcn
_f20
_gy-gencatlg
942 _2ddc
_cBK
955 _apc12 2004-12-06
999 _c30887
_d30887