000 01373pam a2200325 a 4500
001 4981199
003 BD-DhUL
005 20150114150348.0
008 980714s1999 nyua b 001 0 eng
010 _a 98036462
020 _a9812530231
040 _aDLC
_cDLC
_dDLC
_dBD-DhUL
050 0 0 _aTK7874.75
_b.P37 1999
082 0 0 _a621.395
_bPAV
100 1 _aParhi, Keshab K.,
_d1959-
245 1 0 _aVLSI digital signal processing systems :
_bdesign and implementation /
_cKeshab K. Parhi.
260 _aNew York :
_bWiley,
_c1999.
300 _axx, 784 p. :
_bill. ;
_c24 cm.
365 _aUS$
_b8.75
500 _a"A Wiley-Interscience publication."
504 _aIncludes bibliographical references and index.
650 0 _aIntegrated circuits
_xVery large scale integration.
856 4 2 _3Contributor biographical information
_uhttp://www.loc.gov/catdir/bios/wiley041/98036462.html
856 4 2 _3Publisher description
_uhttp://www.loc.gov/catdir/description/wiley032/98036462.html
856 4 _3Table of Contents
_uhttp://www.loc.gov/catdir/toc/onix03/98036462.html
906 _a7
_bcbc
_corignew
_d1
_eocip
_f19
_gy-gencatlg
942 _2ddc
_cBK
955 _apc20 to ja00 07-14-98; jf03 to Subj. 07-15-98; to jg00 for subj. (TK) 07-15-98; jg12 07-15-98; jg07 07-15-98; CIP ver. jf03 to SL 04-26-99
955 _aADDED COPIES: another copy to ASCD pv10 11-19-99
999 _c30953
_d30953